Shreejith holds a Doctoral Degree in Computer Engineering from Nanyang Technological University, Singapore and Bachelors in Electronics & Communication Engineering from the University of Kerala, India. After completing his bachelors degree, Shreejith worked as a digital design engineer/lead developing system architectures for high-speed networking systems, system interconnects and optical backbone networks. Since then, he worked as a research scientist at the Indian Space Research Organisation with focus on avionics systems, scientific experimental payloads and safety/mission-critical compute systems. After completing his PhD, Shreejith joined as a Research Fellow at the Hardware and Embedded Systems Lab (HESL), Nanyang Technological University, Singapore where he explored efficient radio architectures and algorithms for cognitive radio applications and aerospace communication. Subsequently he joined as a Teaching Fellow at the University of Warwick, United Kingdom where he was involved in teaching and research activities in the area of embedded systems, digital design and high-performance computing. His area of expertise includes digital design, field programmable gate arrays, communication networks, embedded systems and distributed compute architectures.
Shreejith’s research focuses on building computer architectures that enable unique ways for improving compute efficiency, network performance and provide reactive capabilities to adapt to changing environments, through seamless interaction of software and hardware. In his research, he has applied this approach to tailor compute/network architectures in different domains such as automotive embedded systems, cognitive radio systems and internet of things. A key enabler for his research is fully programmable platforms (or reconfigurable hardware), which enables both the software and the underlying hardware to be adapted to the compute requirements and specifications, either statically (i.e., at design time) or dynamically (i.e., at run-time). His current research focusses on fully decentralised compute architectures, where the aim is to define and optimise compute and communication in connected compute nodes and in internet of things applications.